Training frontier AI models across clusters of thousands of GPUs (NVIDIA H100, B200, or AMD MI300X) is governed by communication bottlenecks. While individual accelerators deliver petaflops of tensor computation, their compute capability is frequently throttled by the rate at which GPUs can synchronize gradients and parameters across the cluster.

In naive client-server architectures, central parameter servers saturate network interfaces instantly. Distributed AI systems overcome this by employing Collective Communication primitives—primarily All-Reduce, All-Gather, and Reduce-Scatter—executing over high-bandwidth physical interconnects: NVLink inside individual chassis and InfiniBand / RoCEv2 across network fabrics.

This module deconstructs the algorithms and hardware architectures of multi-GPU communication: Ring All-Reduce mathematical derivations, Tree and Double-Binary Tree collective routing, NCCL channel assignment, NVLink vs. InfiniBand throughput bottlenecks, and asynchronous compute-communication overlapping techniques.

What you will learn

  • Derive the mathematical communication volume and time complexity of Ring All-Reduce versus naive parameter server topologies
  • Compare Ring, Tree, and Double-Binary-Tree collective algorithms across varying GPU cluster sizes and latency profiles
  • Analyze intra-node interconnects (NVLink, NVSwitch, PCIe Gen5) versus inter-node fabrics (InfiniBand NDR/HDR, RoCEv2)
  • Deconstruct NVIDIA Collective Communications Library (NCCL) ring formation, channel multiplexing, and CUDA kernel synchronization
  • Implement compute-communication overlapping pipelines overlapping backward-pass gradient all-reduce with layer backpropagation
STAGE TOPICS

Topics in this chapter